发明名称 |
SUBSTRATE BIAS GENERATION CIRCUIT |
摘要 |
PURPOSE:To enable the obtaining of the title device independent of cycle time by a method wherein a reference voltage determining the clamp voltage is impressed on the gate of a clamp transistor which clamps the substrate voltage to a certain value. CONSTITUTION:A clamp transistor Q5 is provided between the output end of a bias generation circuit BVO and the ground. A resistor R and transistors Q6-1-Q6-n is series-connected between the output of said circuit BVO and the ground and constitute a reference voltage generation circuit RVO for impressing reference voltage on the gate of the transistor Q5. This construction keeps the substrate bias current constant even under the variation in cycle time and eliminates the variation in circuit action or the malfunction of circuits caused by the variation in substrate bias. |
申请公布号 |
JPS61177766(A) |
申请公布日期 |
1986.08.09 |
申请号 |
JP19850018901 |
申请日期 |
1985.02.01 |
申请人 |
MITSUBISHI ELECTRIC CORP |
发明人 |
HIDAKA HIDETO;FUJISHIMA KAZUYASU;YOSHIHARA TSUTOMU;KUMANOTANI MASAKI;DOUSAKA KATSUMI;MIYATAKE HIDEJI |
分类号 |
H01L27/04;G05F3/20;G11C11/408;H01L21/822 |
主分类号 |
H01L27/04 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|