| 摘要 |
PURPOSE:To obtain simply and accurately an optimum storage level of a dummy cell by securing the balance between a pair of bit lines driven at the working power supply voltage level and the earth level stored in a memory cell as the information 0 and 1 respectively and using a balance level produced on a bit line as the storage level of a dummy cell. CONSTITUTION:A bit line balance signal line P1 is set at a high level after a sense amplifier SA is set inactive, and the balance is secured between paired bit lines B0 and B1. For this balance level VR1, the capacities given to the lines B0 and B1 are equal to (CB+CR) respectively. Thus the level VR1 is set at VD or GND and therefore VR1=VD/2 is satisfied. The precharge level of the dummy capacity CR is naturally equal to the VR1 in the dummy cells DC00 and DC10 respectively. Then a dummy reset line P3 is set at a low level for the break of connection between cells DC00/DC10 and bit lines B1/B0. Then a bit line precharge signal line P0 is set at a high level to precharge both lines B0 and B1 at a level VP. Hereafter a holding state is continued.
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