| 摘要 |
A logic circuit for use in a variable frequency divider (8) includes a driver (T1, T2), a latch (T3, T4), and an enabling switch (T5, T6) each comprising a pair of emitter coupled transistors. The driver (T1, T2) is coupled to the latch (T3, T4), and the emitters of the transistors of the enabling switch (T5, T6) are coupled to a current source (T9). A collector of each of the transistors of the enabling switch (T5, T6) is coupled to a respective pair of emitters of the latch or the driver. The collector of one of the transistors (T6) of the enabling switch (T5, T6) is coupled to the emitters of either the driver (T1, T2) or the latch (T1, T4) via a control switch (6), or the control switch (6) is coupled between the driver (T1, T2) and the current source (T9). The control switch (6) enables the elimination of external gating arrangements in variable frequency dividers. A variable frequency divider (8) may be constructed from one or more of the logic circuits in combination with one or more flip-flops. The division ratio of the variable frequency divider can be varied in dependence upon a signal (X1) applied to the control switch (6). |
