| 摘要 |
PURPOSE:To attain high speed reset operation without requiring a special reset means to a line to be driven by connecting the line to be driven and a load resistor to an output terminal of a Josephson logical circuit in series and connecting a bias current descending circuit between the logical circuit and a bias current source. CONSTITUTION:In applying an input signal 108 while a bias current is fed between terminals 106 and 107, an RCJL OR circuit 201 transmits an output current to a line 103. In this case, the resistor 104 is selected so as not to reset Josephson elements 203-205 to zero voltage state. In applying an input signal current to the bias current descending circuit means 202, the bias current descends rapidly in the circuit 202 by the action of the Josephson elements 210-212. Since the output current cannot follow this trailing, the current flowing to the elements 203-205 descends rapidly than the bias current and a negative current flows after the current reaches zero. In this case, a punch-through is caused in the elements 203-205 and keep a high impedance being 5-6 times the load resistor 104. The trailing time of the output current is evaluated by a time constant L/R of the circuit. Thus, the time is brought into 1/5-1/6 of the time without the punch-through. |
