| 摘要 |
PURPOSE:To apply a logic circuit consisting of complementary junction-type field effect transistors to VLSI by providing level shifting means between respective gate of p channel CH and n CH and an input terminal in this logic circuit. CONSTITUTION:A level shifting circuit 1 is constituted of n-CH GaSs MESFETs Q5 and Q6 and level shifting means Q7 and Q8, and an inverter circuit 2 is constituted of an n-CH GaAs MESFET Q3 and a p-CH GaAs MESFET Q4. FETs Q5 and Q6 function as a constant current source when the gate voltage is zero, and this constant current is flowed to means Q7 and Q8 to generate a certain voltage drop. Diodes Q7 and Q8 as level shifting means and gate diodes of FETs Q5 and Q6 are connected in series between an input terminal IN and a power supply terminal VDD and between the terminal IN and a ground terminal GND. Therefore, if the power source voltage is set to a value lower than gate turn-on voltages of two diodes, gates of FETs Q3 and Q4 are not made conductive, and the circuit 2 is operated normally with a low power consumption, and thus, this logic circuit can be applied to VLSI. |
