| 摘要 |
PURPOSE:To absorb a counter error and a delay in a window pulse by generating the window pulse from a delay pulse being below and 3/4 in the biphase mark modulating system. CONSTITUTION:A prescribed high frequency signal is outputted from an oscillator 20 as a sample signal and an edge detection pulse passing through a gate circuit is impressed to clear terminal of a counter 21. Thus, a delay pulse outputted from a 1/4 delay circuit 24 is delayed from the edge detection pulse by <1/4 time and the pulse delayed by <3/4 time is outputted from a 1/2 delay circuit 26. Thus, a pulse waveform of opposite phase to that of the window pulse obtained by phase-inverting a Q output of an FF25 at an inverter is obtained and when the window pulse is at a high level and an edge detection pulse input exists, a decoding circuit outputs ''1'' level and when no pulse input exists, the decoding circuit outputs ''0'' level. |
