发明名称 LOGICAL CIRCUIT DEVICE
摘要 <p>PURPOSE:To preset prescribed data simply for a short time by providing the titled device with the 1st circuit means for simultaneously driving respective word lines and the 2nd circuit means for simultaneously applying the logical state of ''1'' or ''0''. CONSTITUTION:Many memory cells M are arrayed like a matrix. To select and drive an optional memory cell out of the many memory cells M, word lines W and data lines Da, Db are connected. The word lines W and the data lines Da, Db are alternatively selected and driven by decoder outputs Y0-Y4 and X0-X2 from an address decoder. Respective data lines Da, Db are connected to common data lines DA, DB in common through MOSFETs Qa, Qb respectively. The MOSFETs Qa, Qb are driven by the column selecting decoder outputs X0-X2.</p>
申请公布号 JPS59229633(A) 申请公布日期 1984.12.24
申请号 JP19830102576 申请日期 1983.06.10
申请人 HITACHI SEISAKUSHO KK 发明人 HOTSUTA SHINKICHI;IWATA KATSUMI;FUNATSU KENZOU
分类号 G06F1/24;G06F1/00 主分类号 G06F1/24
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