| 摘要 |
PURPOSE:To switch at a high speed the pulse waveform mode in real time by supplying the pulse waveform data to a shift register after converting it into the time series data and making use of a parallel/seri conversion shift action of said register. CONSTITUTION:FFs1-3 are a latch circuit, DCR1 is a waveform decoder, DCR2 is a waveform formatter decoder and SR is a shift register An RZ waveform is obtained with a cycle T1. Then the P0 P1 and P2 of a data signal are set at ''0'', ''1'' and ''1'', respectively as long as the pulse waveform to be formed in the next cycle T2 is equal to ''1'' of an NRZ signal. Therefore signals P0-P2 are fetched to D0-D2 of the SR at the rise of a signal S, and the output is set at ''0'' of the lowest digit D0 in this timing. The signal S is set at ''1'' synchronously with the fall of a signal phi1, and the SR is set in a shift operation mode. Therefore the SR has a shift action synchronously with the rise of the next clock CK synchronizing with a signal phi2. In this timing the output is changed to high ''1'' which is preset to a digit D1. |
