发明名称 (+-)5-NOTATION ADDING 3X3 MATRIX
摘要 PURPOSE:To generate an easy + or -5-notation adding matrix to perform the operation of a computer at a high speed, by expressing one digit of a + or -5-notation number with a sign bit S and a three-bit numerical value of weight. CONSTITUTION:A matrix is constituted with signals ''2'', ''1'', ''0'' of a number A and those of a number B, and an AND gate of two inputs is placed in each intersection. OR gates R5-R0 are provided on the matrix, and all outputs are inputted to them. AND gates H are provided following OR gates R. A signal -delta (OR between signal 03 and signal 30) is connected to the gate H3, and a signal delta (OR between signal 00 and signal 33) is connected to gates H4 and H0. If the signal -delta on a line beta is turned on, a main output 3 is outputted when the gate H3 is turned on; and if the signal delta of the line beta is turned on, main output 0 is outputted when the gate H0 is turned on. Since NOT of the gate H0 is connected to a gate h4 following the gate H4, 4 is not outputted when the gate H0 is turned on. When an AND gate 0Osigma is turned on, the gate H0 is cut, and a suboutput h4 is made conductive.
申请公布号 JPS59139445(A) 申请公布日期 1984.08.10
申请号 JP19830012278 申请日期 1983.01.28
申请人 SUGIMURA YUUKICHI 发明人 SUGIMURA YUUKICHI
分类号 G06F7/49;G06F7/491;G06F7/494;G06F7/50 主分类号 G06F7/49
代理机构 代理人
主权项
地址