| 摘要 |
PURPOSE:To transfer data between memories in a high speed, by providing an address generating circuit or the like which generaes an address of a memory where data should be stored on a basis of data transfer destination information. CONSTITUTION:The address generating circuit or the like is provided which generates a data storage address of a data transfer destination memory on a basis on a data transfer destination address. For example, a DMA control part 3 is started by a microprocessor CPU 1, and a data transfer destination address ADD is outputted onto a common bus 2 on a basis of the address value stored in a start address register SA, and an I/O read signal READ is outputted also. Data DATA to be stored in an area of a character generator CG 8 is outputted onto the common bus 2, and an I/O write signal WR is outputted on a basis of the address of a register IOA when DMA transfer data is read out. The signal WR is conveted to a write signal WR' to a screen buffer memory 6 by a converting circuit 13. |
