| 摘要 |
PURPOSE:To switch the frequency with the center value of voltage of an AC signal and at the same time to simplify the constitution of an FSK modulation circuit, by switching the analog signal with the center value of voltage in response to the L and H values of a binary data signal. CONSTITUTION:An FF1 delivers the data signal synchronously with the clock signal. For a counter 2, one of plural preset terminals is connected to the output of the FF1 to decide a ratio with which the clock signal is divided into two types of frequencies in response to the output contents of the FF1. A counter 3 supplies a frequency f1 or f2 in response to the above-mentioned dividing ratio and then dividing and delivering the frequency. A switch circuit 6 produces a staircase wave of an optional number of steps from the output of the counter 3. A synchronism detecting circuit 4 detects the numerical value obtained when the output of the counter 3 passes the steps of half optional number of steps of the staircase wave and then applies the detection signal to the clock terminal of the FF1. Then the frequencies f1 and f2 which are decided in response to the L and H values of the input data signal are switched with the center value of voltage and delivered alternately from an A/D converting circuit 7. |
