发明名称 MANUFACTURE OF INSULATED GATE TYPE SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To eliminate the punch-through phenomenon between drain and source for assuring stable operation by a method wherein a circuit block required of accelerating circuit operation and another circuit block required of high withstand voltage characteristics are separately formed on the substrate parts respectively with high and low specific resistance. CONSTITUTION:A P type region 2 is formed in a P type silicon substrate 1. Next a specific circuit block 3 such as a memory cell whereon high voltage is impressed in case of writing, a writing circuit and the like is formed in the P type well region 2 which a residual block 4 including a source amplifier circuit for reading and other peripheral circuit is formed in the P type silicon substrate wherein the P type well region 2 is not formed. Then a FAMOS memory IC is formed by connecting the circuit elements with each other. When the circuit block 3 including the memory cell is impressed with high voltage from a terminal 5, a floating gate 13 may be charged with avalanche electrons to be accumulated for writing.
申请公布号 JPS5982771(A) 申请公布日期 1984.05.12
申请号 JP19820192960 申请日期 1982.11.02
申请人 MATSUSHITA DENSHI KOGYO KK 发明人 NAKAMURA SHIGEAKI
分类号 H01L27/112;G11C16/06;G11C17/00;H01L21/822;H01L21/8246;H01L21/8247;H01L27/04;H01L27/115;H01L29/788;H01L29/792 主分类号 H01L27/112
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