| 摘要 |
PURPOSE:To enable to set the interval between both power lines without excessive bent of metallic wire for connecting between NOR and NAND logics and to facilitate a design by an automatic processing by forming an additional diffused layer pattern in the structure of a circuit associated with multi-input logic such as NAND logic and NOR logic, thereby producing output signals from arbitrary positions. CONSTITUTION:A diffused layer pattern is added from the lower part of a load transistor so that a high voltage power line and a low voltage power line are coupled in parallel with the pattern which performs an NAND logic, thereby producing an output from an arbitrary position of the pattern. A diffused layer pattern 301 is added at the positions of metallic layer wires 302, 303, thereby producing the output signal via the metallic layer wire 304. |
