发明名称 MEMORY CIRCUIT
摘要 PURPOSE:To realize a memory circuit by a small number of gates, by constituting a memory cell by cross coupling-connecting input/output terminals of the first and second coincidence gates. CONSTITUTION:A memory cell 100 is constituted by cross coupling-connecting input/output terminals of the first and second coincidence gates 1, 2. To the other input terminal of the first coincidence gate 1, an output terminal of the third coincidence gate 3 is connected. To one input terminal DI of the third coincidence gate 3, an input signal is applied, and also to the other input terminal L1, the first loading signal is applied. Also, to the other input terminal L2 of the other input terminal L2 of the second coincidence gate 2, the second loading signal incoming simultaneously with a trailing edge of the first loading signal or earilier than it in its time is applied.
申请公布号 JPS57200992(A) 申请公布日期 1982.12.09
申请号 JP19810086466 申请日期 1981.06.04
申请人 MATSUSHITA DENKI SANGYO KK 发明人 MIZUGUCHI HIROSHI
分类号 G11C11/411;G11C11/41;H03K3/037 主分类号 G11C11/411
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