Error detection in microprocessor systems - by executing error routine during access period of macro-programmed memory

摘要

An error detector routine for microprocessor systems operates during the accessing period required for macro-instructions and so does not slow down the operation of the system. The central processor is controlled by a micro programme store for executing all internal control signal generations. User data is entered from a separate memory over a register and multiplexer. Macro-instructions, such as jump operations, are held in a programme store coupled over a register and first-in-first out memory. During the access period of the macro store, an error checking operation is performed. Test data held in a register is delivered and transmitted to mask register. The generated data is multiplexed into a second register and is compared with the output to indicate any error.