发明名称 SEMICONDUCTOR MEMORY
摘要 PURPOSE:To obtain a high-speed and stable operation by arranging such that a digit lines for a differential detection are positioned in the close proximity of each other and that they are laid out in the same side as the preamplifier. CONSTITUTION:A data line D0 in which differential readout signal appears, is layouted parallely adjacent to D0. Then, memory cell is connected to only one of the crossed points of both each word line W0-W63, DW0 and DW and a data line D0. Some memory cell (e.g. MC62) at the moment of readout, a dummy cell DM0 connected to the data line in which the cell is not connected is read out simultaneously so that the differential voltage appeared in the data line D0, is used efficiently. The differential signal amplified at a preamplifier PA0 passes a transistor Q0 and Q 0 by means of the transmission of an adress signal A0 which is an output of decorder to be input to a differential amplifier MA and again it is amplified by means of differential.
申请公布号 JPS5530897(A) 申请公布日期 1980.03.04
申请号 JP19790111766 申请日期 1979.09.03
申请人 HITACHI LTD 发明人 ITOU KIYOO
分类号 G11C11/401;H01L21/3205;H01L21/8242;H01L23/52;H01L27/10;H01L27/108 主分类号 G11C11/401
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