| 摘要 |
<p>An arrangement for detecting quadrature phase errors (16,18) introduced by a synchronous demodulator between the two quadrature channels, in-phase (I) and quadrature-phase (Q), of a synchronous demodulator (12), and for correcting for such detected quadrature phase errors without the need for high data sampling rates. During an initial test period, a periodic symmetrical test signal of known frequency is introduced into the synchronous demodulator (12). During the test period, the output of the synchronous demodulator (12) is integrated over an integer multiple of periods to detect the quadrature phase error introduced by the synchronous demodulator, and an error signal is generated representative of the detected quadrature phase error. During a following period of operation of the synchronous demodulator (12), the in-phase (I) and quadrature-phase (Q) signals produced by the synchronous demodulator (12) are applied to a quadrature phase error correction network (18), along with the generated quadrature phase error signal. The quadrature phase error correction network (18) applies the quadrature phase error signal to at least one of the in-phase and quadrature-phase signals to minimize or eliminate the detected quadrature phase error between the in-phase and quadrature-phase signals. <IMAGE></p> |
