Voids in STI regions for forming bulk FinFETs

摘要

An embodiment is an integrated circuit structure including two insulation regions over a substrate with one of the two insulation regions including a void, at least a bottom surface of the void being defined by the one of the two insulation regions. The integrated circuit structure further includes a first semiconductor strip between and adjoining the two insulation regions, where the first semiconductor strip includes a top portion forming a fin over top surfaces of the two insulation regions, a gate dielectric over a top surface and sidewalls of the fin, and a gate electrode over the gate dielectric.

主权项

1. A method comprising:
forming a first semiconductor strip extending from a substrate; forming two insulation regions over the substrate and adjoining sides of the first semiconductor strip, the first semiconductor strip comprising an upper portion over top surfaces of the two insulation regions forming a fin, each of the two insulation regions comprising a void therein, at least bottom surfaces of the voids being defined by the corresponding one of the two insulation regions; forming a gate dielectric over a top surface and sidewalls of the fin; and forming a gate electrode over the gate dielectric.