Sense Amplifier With Integrating Capacitor And Methods Of Operation

摘要

A non-volatile memory is described that includes a sense amplifier that maintains a bit line voltage and output of the sense amplifier at a substantially constant voltage during read operations. During a preset phase, an output of the sense amplifier that is coupled to a selected bit line is grounded. At least one capacitor is precharged during the preset phase. During a sense phase, the sense amplifier output is disconnected from ground while the memory array is biased for reading a selected memory cell. A resulting cell current is integrated by the at least one capacitor. The integrated cell current discharges a sense node from the precharge level to an accurate voltage level based on the resulting cell current.

主权项

1. A non-volatile storage system, comprising:
a sense amplifier output selectively coupled to a bit line; a first capacitor including a first plate coupled to the sense amplifier output and including a second plate; a second capacitor including a first plate coupled to the sense amplifier output and a second plate selectively coupled to a voltage source; a first transistor including a gate coupled to the second terminal of the first capacitor, the first transistor includes a first terminal and a second terminal, the second terminal is coupled to ground; and a second transistor including a gate coupled to the second terminal of the first capacitor, the second transistor includes a first terminal and a second terminal, the first terminal is coupled to a current source and is selectively coupled to the second plate of the first capacitor and the second plate of the second capacitor, the second terminal of the second transistor is coupled to the first terminal of the first transistor.