发明名称 Semiconductor memory device and method of fabricating the same
摘要 A semiconductor memory device includes a stack including gate electrodes and insulating layers that are alternately and repeatedly stacked on a substrate. A cell channel structure penetrates the stack. The cell channel structure includes a first semiconductor pattern contacting the substrate and a first channel pattern on the first semiconductor pattern. The first semiconductor pattern extends to a first height from a surface of the substrate to a top surface of the first semiconductor pattern. A dummy channel structure on the substrate and spaced apart from the stack. The dummy channel structure includes a second semiconductor pattern contacting the substrate and a second channel pattern on the second semiconductor pattern. The second semiconductor pattern extends to a second height from the surface of the substrate to a top surface of the second semiconductor pattern. The first height is greater than the second height.
申请公布号 US9478561(B2) 申请公布日期 2016.10.25
申请号 US201514960776 申请日期 2015.12.07
申请人 Samsung Electronics Co., Ltd. 发明人 Kim Chaeho;Yang Sangryol;Lee Woong;Lim SeungHyun
分类号 H01L27/105;H01L27/115;H01L29/51;H01L29/423 主分类号 H01L27/105
代理机构 Harness, Dickey & Pierce, P.L.C. 代理人 Harness, Dickey & Pierce, P.L.C.
主权项 1. A semiconductor memory device, comprising: a substrate; a stack on the substrate, the stack including gate electrodes and insulating layers that are alternately and repeatedly stacked on the substrate; a cell channel structure penetrating the stack, the cell channel structure including a first semiconductor pattern contacting the substrate and a first channel pattern on the first semiconductor pattern,the first channel pattern contacting the first semiconductor pattern,the first semiconductor pattern extending to a first height from a surface of the substrate to a top surface of the first semiconductor pattern; and a first dummy channel structure on the substrate, the first dummy channel structure being spaced apart from the stack,the first dummy channel structure including a second semiconductor pattern contacting the substrate and a second channel pattern on the second semiconductor pattern,the second channel pattern contacting the second semiconductor pattern,the second semiconductor pattern extending to a second height from the surface of the substrate to a top surface of the second semiconductor pattern, andthe first height being greater than the second height.
地址 Gyeonggi-do KR