摘要 |
PURPOSE:To increase a counting range by providing a counter capable of operating at a high speed to an initial stage, and by counting the overflow output of the counter by inputting it to another counter which uses a microprogram. CONSTITUTION:A counter 11 capable of operating at a high speed which is composed of an integrated circuit on the whole by cascading FFs is provided to an initial stage, and the overflow output of this counter 11 is counted by counters 1-9 which operate on microprogram basis having a long operation period. Consequently, a signal outputted as a low-frequency one through the counting of the initial-stage counter 11 is counted by a microprocessor, so high- speed processing is achieved while the number of digits of the counter is increased greatly by using register arithmetic by a microprogram in combination without providing more than one stage of the counter of hardware. |