发明名称 Fabrication of single or multiple gate field plates
摘要 A process for fabricating single or multiple gate field plates using consecutive steps of dielectric material deposition/growth, dielectric material etch and metal evaporation on the surface of a field effect transistors. This fabrication process permits a tight control on the field plate operation since dielectric material deposition/growth is typically a well controllable process. Moreover, the dielectric material deposited on the device surface does not need to be removed from the device intrinsic regions: this essentially enables the realization of field-plated devices without the need of low-damage dielectric material dry/wet etches. Using multiple gate field plates also reduces gate resistance by multiple connections, thus improving performances of large periphery and/or sub-micron gate devices.
申请公布号 US9496353(B2) 申请公布日期 2016.11.15
申请号 US201012898341 申请日期 2010.10.05
申请人 The Regents of the University of California;Cree, Inc. 发明人 Chini Alessandro;Mishra Umesh K.;Parikh Primit;Wu Yifeng
分类号 H01L29/40;H01L27/06;H01L29/423;H01L29/66;H01L29/778;H01L29/20;H01L29/207;H01L29/417;H01L29/78 主分类号 H01L29/40
代理机构 Gates & Cooper LLP 代理人 Gates & Cooper LLP
主权项 1. A method of fabricating one or more gate field plates, comprising: providing a dielectric material layer directly on an active region and directly on a gate of a device; etching the dielectric material layer; and evaporating metal onto the dielectric material layer, after etching the dielectric material layer, to create at least one field plate, wherein: (i) none of the dielectric material layer provided on the active region of the device is removed to expose the active region; (ii) the at least one field plate is created on the dielectric material layer and at least overlaps the gate above the active region; and (iii) the gate is directly on the active region.
地址 Oakland CA US