Chip-on-Substrate Packaging on Carrier

摘要

A method includes mounting a wafer-level package substrate over a carrier, and pre-cutting the wafer-level package substrate to form trenches extending from a top surface of the wafer-level package substrate into the wafer-level package substrate. A plurality of dies is bonded over the wafer-level package substrate. The plurality of dies is molded in a molding material to form a wafer-level package, with the wafer-level package including the wafer-level package substrate, the plurality of dies, and the molding material. The carrier is detached from the wafer-level package. The wafer-level package is sawed into a plurality of packages, with each of the plurality of packages including a portion of the wafer-level package substrate and one of the plurality of dies.

主权项

1. A method comprising:
pre-cutting a wafer-level package substrate to form trenches, wherein the wafer-level package substrate comprises:
a core dielectric layer;conductive pipes penetrating through the core dielectric layer;a first dielectric layer overlying and contacting the core dielectric layer, wherein the trenches extend from a top surface of the wafer-level package substrate to at least a bottom surface of the first dielectric layer; anda second dielectric layer underlying the core dielectric layer, wherein the first dielectric layer and the second dielectric layer form distinguishable interfaces with the core dielectric layer; bonding a plurality of dies over the wafer-level package substrate; encapsulating the plurality of dies in an encapsulating material to form a wafer-level package; and sawing the wafer-level package into a plurality of packages, with each of the plurality of packages comprising a portion of the wafer-level package substrate and one of the plurality of dies.