发明名称 Systems, methods and devices for a memory having a buried select line
摘要 Memory cells and methods for programming and erasing a memory cell by utilizing a buried select line are described. A voltage potential may be generated between a source-drain region and the buried select line region of the memory cell to store charge in a storage region between the source-drain and buried select line regions. The generated voltage potential causes electrons to either tunnel towards the buried storage region to store electrical charge or away from the buried storage region to discharge electrical charge.
申请公布号 US9583195(B2) 申请公布日期 2017.02.28
申请号 US201314013336 申请日期 2013.08.29
申请人 Micron Technology, Inc. 发明人 El-Kareh Badih
分类号 G11C16/10;G11C16/04;H01L27/115;G11C16/06;G11C16/26 主分类号 G11C16/10
代理机构 Dorsey & Whitney LLP 代理人 Dorsey & Whitney LLP
主权项 1. A method comprising: applying a first voltage potential to a control gate buried below a channel region of a memory cell; applying a second voltage potential to the control gate buried below the channel region, wherein the second voltage potential has a polarity opposite to the polarity of the first voltage potential; storing an electric charge at a storage region of the memory cell below the channel region responsive to the first voltage potential, wherein the storage region is disposed below the channel region and above the control gate, and wherein the storage region is laterally encapsulated by a first well region having a first width and the control gate is laterally encapsulated by a second well region disposed below the first well region and having a second width that is less than the first width; and discharging the electric charge in the storage region stored below the channel region responsive to the second voltage potential.
地址 Boise ID US
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