| 主权项 |
1. A method for operating a logical operation array of a resistive random access memory, comprising:
turning on a first field effect transistor switch of at least one logical operation unit in the logical operation array; turning off a second field effect transistor switch of the logical operation unit; setting a third resistive random access memory of the logical operation unit to a storage bit write voltage; and separately inputting a level signal to input ends of a first resistive random access memory and a second resistive random access memory of the logical operation unit, wherein the logical operation array comprises at least one logical operation unit, wherein each logical operation unit comprises the first resistive random access memory, the second resistive random access memory, the third resistive random access memory, the first field effect transistor switch, the second field effect transistor switch, and a voltage converter, wherein an input end of the first resistive random access memory serves as a first bit line input end, wherein an input end of the second resistive random access memory serves as a second bit line input end, wherein an output end of the first resistive random access memory is connected to an output end of the second resistive random access memory, and is connected to an input end of the voltage converter, wherein a gate electrode input end of the first field effect transistor switch serves as a first word line input end, wherein a gate electrode input end of the second field effect transistor switch serves as a second word line input end, wherein an output end of the voltage converter is connected to a drain electrode of the first field effect transistor switch, wherein a source electrode of the first field effect transistor switch is connected to an input end of the third resistive random access memory, wherein the input end of the third resistive random access memory is further connected to a drain electrode of the second field effect transistor switch, wherein a source electrode of the second field effect transistor switch is grounded, and wherein after a logical operation, turning off the first field effect transistor switch, turning on the second field effect transistor switch, setting the third resistive random access memory to a read voltage, and outputting a level signal that is stored in the third resistive random access memory after the logical operation. |
