APPARATUS AND METHOD FOR DISTRIBUTED INSTRUCTION TRACE IN A PROCESSOR SYSTEM

摘要

One disclosed embodiment provides an integrated circuit that has a plurality of processors and a plurality of processor trace collection logic units. Each processor trace collection logic unit corresponds with, and is operatively coupled to, one of the processors. A separate filtering logic unit is operatively coupled to the plurality of processor trace collection logic units. In some embodiments of the integrated circuit, each processor trace collection logic unit is operative to continuously collect processor trace information from a corresponding operatively coupled processor. Each filtering logic unit is operative to monitor the continuous processor trace information for occurrence of a predetermined condition, and to store some of the processor trace information to memory in response to occurrence of that condition.

主权项

1. An integrated circuit comprising:
a plurality of processors; a plurality of processor trace collection logic units, each processor trace collection logic unit corresponding and operatively coupled to one of the processors; and a filtering logic unit operatively coupled to the plurality of processor trace collection logic units.