| 发明名称 |
SCAN FLIP-FLOP AND SCAN TEST CIRCUIT INCLUDING THE SAME |
| 摘要 |
A scan flip-flop includes an input unit and a flip-flop. The input unit is configured to select one signal from among a data input signal and a scan input signal to supply the selected one signal as an internal signal according to an operation mode. The flip-flop os configured to latch the internal signal according to a clock signal. The flip-flop includes a cross coupled structure that includes first and second tri-state inverters which share a first output node and face each other. |
| 申请公布号 |
US2016097811(A1) |
申请公布日期 |
2016.04.07 |
| 申请号 |
US201514873634 |
申请日期 |
2015.10.02 |
| 申请人 |
KIM HA-YOUNG;CHO SUNG-WEE;LEE DAL-HEE;LEE JAE-HA |
发明人 |
KIM HA-YOUNG;CHO SUNG-WEE;LEE DAL-HEE;LEE JAE-HA |
| 分类号 |
G01R31/3177;G01R31/317;H03K3/037 |
主分类号 |
G01R31/3177 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A scan flip-flop comprising:
an input unit configured to select one signal from among a data input signal and a scan input signal to supply the selected one signal as an internal signal according to an operation mode; and a flip-flop configured to latch the internal signal according to a clock signal, the flip-flop including a cross coupled structure that includes first and second tri-state inverters which share a first output node and face each other. |
| 地址 |
SEOUL KR |
