发明名称 SYSTEM AND METHOD FOR A CACHE IN A MULTI-CORE PROCESSOR
摘要 The invention relates to a multi-core processor system, in particular a single-package multi-core processor system, comprising at least two processor cores, preferably at least four processor cores, each of said a least two cores, preferably at least four processor core, having a local LEVEL-1 cache, a tree communication structure combining the multiple LEVEL-1 caches, the tree having at 1 a one node, preferably at least three nodes for a four processor. core multi-core processor, and TAG information is associated to data managed within the tree, usable in the treatment of the data.
申请公布号 US2016004639(A1) 申请公布日期 2016.01.07
申请号 US201514791350 申请日期 2015.07.03
申请人 Hyperion Core Inc. 发明人 VORBACH Martin
分类号 G06F12/08 主分类号 G06F12/08
代理机构 代理人
主权项
地址 Los Gatos CA US