发明名称 |
Methods and apparatuses for controlling thread contention |
摘要 |
An apparatus comprises a plurality of cores and a controller coupled to the cores. The controller is to lower an operating point of a first core if a first number based on processor clock cycles per instruction (CPI) associated with a second core is higher than a first threshold. The controller is operable to increase the operating point of the first core if the first number is lower than a second threshold. |
申请公布号 |
US9218046(B2) |
申请公布日期 |
2015.12.22 |
申请号 |
US201414564436 |
申请日期 |
2014.12.09 |
申请人 |
Intel Corporation |
发明人 |
Herdrich Andrew;Illikkal Ramesh;Newell Donald;Iyer Ravishankar;Chadha Vineet |
分类号 |
G06F1/00;G06F1/26;G06F1/32;G06F9/46;G06F9/50;G06F12/08 |
主分类号 |
G06F1/00 |
代理机构 |
Trop, Pruner & Hu, P.C. |
代理人 |
Trop, Pruner & Hu, P.C. |
主权项 |
1. A processor comprising:
a plurality of cores; a controller coupled to the plurality of cores including circuitry adapted to reduce an operating point of a first core of the plurality of cores based on a comparison of a performance metric of a second core of the plurality of cores to a set point of the controller, wherein the controller includes circuitry adapted to reduce a throttle state of the first core until a lowest throttle state is reached, and to thereafter reduce a performance state of the first core, wherein the first core is to execute a background application and the second core is to execute a foreground application; and a setting logic to set the set point of the controller. |
地址 |
Santa Clara CA US |