发明名称 Non-volatile memory device and programming method using fewer verification voltages than programmable data states
摘要 A method of programming a non-volatile memory device includes; defining a set of verification voltages, setting a maximum verification voltage among verification voltages that are less than or equal to a first target programming voltage to be a target verification voltage, calculating a number of extra pulses based on the target verification voltage and the first target programming voltage, verifying whether a threshold voltage of the memory cell is equal to or greater than the target verification voltage by applying an incremental step pulse program (ISPP) pulse to the memory cell and then applying at least one verification voltage in the set of verification voltages to the memory cell, and further applying the ISPP pulse to the memory cell a number of times equal to the number of extra pulses when the threshold voltage is verified to be equal to or greater than the target verification voltage.
申请公布号 US9202576(B2) 申请公布日期 2015.12.01
申请号 US201414211077 申请日期 2014.03.14
申请人 Samsung Electronics Co., Ltd. 发明人 Shereshevski Yoav;Dor Avner;Dashevsky Shmuel;Kong Jun Jin;Yoon Pil Sang
分类号 G11C16/04;G11C16/10;G11C11/56;G11C16/34 主分类号 G11C16/04
代理机构 Volentine & Whitt, PLLC 代理人 Volentine & Whitt, PLLC
主权项 1. A method of programming a non-volatile memory device, the method comprising: defining a set of verification voltages for a memory cell having a number of programmable data states, wherein a number of verification voltages in the set of verification voltages is less than a number of the programmable data states; setting a maximum verification voltage among verification voltages that are less than or equal to a first target programming voltage to be a target verification voltage; calculating a number of extra pulses based on the target verification voltage and the first target programming voltage; verifying whether a threshold voltage of the memory cell is equal to or greater than the target verification voltage by applying an incremental step pulse program (ISPP) pulse to the memory cell and then applying at least one verification voltage in the set of verification voltages to the memory cell; further applying the ISPP pulse to the memory cell a number of times equal to the number of extra pulses when the threshold voltage is verified to be equal to or greater than the target verification voltage; and after further applying the ISPP pulse to the memory cell the number of times equal to the number of extra pulses, setting the memory cell in an inhibit state.
地址 Suwon-si, Gyeonggi-do KR