发明名称 Fabric discovery for a cluster of nodes
摘要 Implementations of discovery functionalities in accordance with the present invention are characterized by being exceptionally minimalistic. A primary reason and benefit for such minimalistic implementations relate to these discovery functionalities being implemented via a management processor and associated resources of a system on a chip (SoC) unit as opposed to them being implemented on data processing components of a cluster of nodes (i.e., central processing core components). By focusing on such a minimalist implementation, embodiments of the present invention allow discovery functionalities to be implemented on a relatively low-cost low-power management processor coupled to processing cores that provide for data serving functionality in the cluster of nodes.
申请公布号 US9170971(B2) 申请公布日期 2015.10.27
申请号 US201213726964 申请日期 2012.12.26
申请人 III Holdings 2, LLC 发明人 Goss Kenneth S.;Nold Daniel M.;Sathaye Sumedh;Davis Mark B.;Blair George R.
分类号 G06F13/40;H04L12/701;H04L12/933;H04L12/751 主分类号 G06F13/40
代理机构 代理人
主权项 1. A data processing system, comprising: a plurality of interconnected system on a chip (SoC) units, wherein each SoC unit includes: one or more processing cores; one or more peripheral element interfaces coupled to the one or more processing cores; one or more external ports configured to allow communication of information between the one or more processing cores and other ones of the SoC units; a switching fabric coupled between the one or more processing cores; and a management engine coupled to the switching fabric and to each one of the one or more processing cores, wherein the management engine includes one or more management processors, a memory accessible by the one or more management processors, and instructions stored on the memory, wherein, upon execution, the instructions are configured to cause the one or more management processors to generate depth chart entries for a depth chart, wherein the depth chart entries are configured to enable routing of information to each of the SoC units, and wherein the depth chart is an array that is indexed by destination node; wherein the management engine is configured to generate a spanning tree representation of the plurality of interconnected SoC units based on information derived from the depth chart.
地址 Wilmington DE US