发明名称 |
Compound tunneling field effect transistor integrated on silicon substrate and method for fabricating the same |
摘要 |
Compound tunneling field effect transistors integrated on a silicon substrate are provided with increased tunneling efficiency and an abrupt band slope by forming a source region with a material having a bandgap at least 0.4 electron volts (eV) narrower than that of silicon to increase a driving current (ON current) by forming a channel region with a material having almost no difference in lattice constant from a source region and having a high electron mobility at least 5 times higher than silicon. ON/OFF current ratio simultaneously is increased by forming a drain region with a material having a bandgap at least as wide as a channel region material to restrain OFF current. Tunneling field effect transistors having various threshold voltages according to circuit designs are formed easily by adding a specific material with an electron affinity less than a source region material when forming a channel region. |
申请公布号 |
US9136363(B2) |
申请公布日期 |
2015.09.15 |
申请号 |
US201114357685 |
申请日期 |
2011.12.30 |
申请人 |
Seoul National University R&DB FOUNDATION;Kyungpook National University Industry-Academic Cooperation Foundation;The Board of Trustees of the Leland Stanford Junior University |
发明人 |
Park Byung-Gook;Cho Seongjae;Kang In Man |
分类号 |
H01L29/06;H01L29/775;H01L29/66;H01L29/739;H01L29/267;H01L29/423 |
主分类号 |
H01L29/06 |
代理机构 |
|
代理人 |
Hespos Gerald E.;Porco Michael J.;Hespos Matthew T. |
主权项 |
1. A compound tunneling field effect transistor comprising:
a silicon substrate; a source region formed of a first semiconductor material having a lattice constant difference with silicon 5% or less, a bandgap at least 0.4 electron volts (eV) narrower than that of silicon and a first conductive type on the silicon substrate; a channel region formed of a second semiconductor material having a lattice constant difference with the first semiconductor material 2% or less, a bandgap wider than that of the first semiconductor material and electron mobility at least 5 times higher than that of silicon on the source region; a drain region formed of a third semiconductor material having a lattice constant difference with the second semiconductor material 1% or less, a bandgap wider than or equal to that of the second semiconductor material and a second conductive type opposite to the first conductive type on the channel region; a gate dielectric layer formed on a sidewall of the channel region; and a gate electrode formed on the gate dielectric layer, wherein a vertical channel is further included. |
地址 |
KR |