Processors

摘要

A processing apparatus comprises a plurality of processors 12, each arranged to perform an instruction, and a bus 20 arranged to carry data and control tokens between the processors. Each processor 12 is arranged, if it receives a control token via the bus, to carry out the instruction, and on carrying out the instruction, to perform an operation on the data, to identify any of the processors 12 which are to be data target processors, and to transmit output data to any identified data target processors, to identify any of the processors which are to be control target processors, and to transmit a control token to any identified control target processors.

主权项

1. A processing apparatus comprising a plurality of chips each comprising a plurality of processors, each processor arranged to perform an instruction, and a bus arranged to carry data tokens and control tokens between the processors, wherein each processor is arranged, if it receives a control token via the bus, to carry out the instruction, and on carrying out the instruction, to perform an operation on the data to produce a result, to identify any of the processors which are to be data target processors, and to transmit output data to any identified data target processors, to identify any of the processors which are to be control target processors, and to transmit a control token to any identified control target processors, each chip having an input device which receives tokens from the bus and an output device from which tokens can be transferred to another of the chips, wherein the plurality of processors are between the input and output device and each processor has an address associated with it, the addresses being within a range, the apparatus being arranged; on receipt by the output device of a token having a target address which is outside the range, to perform a modification of the target address, and to transfer the token to said other chip.