| 发明名称 | Bump-on-trace (BOT) structures and methods for forming the same | ||
| 摘要 | An integrated circuit structure includes a package component, which includes a dielectric layer and a metal trace over and in contact with the dielectric layer. The dielectric layer includes a first dielectric material and a second dielectric material in the first dielectric material. The first dielectric material is a flowable and curable material. The second dielectric material comprises a functional group selected from the group consisting essentially of (—C—N—), (—C—O—), (—N—C═O), and combinations thereof. | ||
| 申请公布号 | US9082765(B2) | 申请公布日期 | 2015.07.14 |
| 申请号 | US201313789852 | 申请日期 | 2013.03.08 |
| 申请人 | Taiwan Semiconductor Manufacturing Company, Ltd. | 发明人 | Yu Chen-Hua;Lee Chien-Hsun;Wu Jiun Yi |
| 分类号 | H01L23/00;H01L21/00;H01L23/498;H01L21/768;H01L21/48;H01L21/56;H01L23/14 | 主分类号 | H01L23/00 |
| 代理机构 | Slater & Matsil, L.L.P. | 代理人 | Slater & Matsil, L.L.P. |
| 主权项 | 1. An integrated circuit structure comprising: a first package component comprising: a dielectric layer comprising a first dielectric material and a second dielectric material in the first dielectric material, wherein the first dielectric material is a flowable and curable material, and wherein the second dielectric material comprises a functional group selected from the group consisting essentially of (—C—N—), (—C—O—), (—N—C═O), and combinations thereof; and a metal trace over and in contact with the dielectric layer. | ||
| 地址 | Hsin-Chu TW | ||