发明名称 Control system for resource selection between or among conjoined-cores
摘要 A processing system is provided for processing signals in a processor system including first and second conjoined-cores, and sharing a single floating point unit or a single memory interconnection network port by the first and second conjoined-cores.
申请公布号 US9003168(B1) 申请公布日期 2015.04.07
申请号 US200511061696 申请日期 2005.02.17
申请人 Hewlett-Packard Development Company, L. P. 发明人 Jouppi Norman Paul;Ranganathan Parthasarathy
分类号 G06F9/30;G06F15/173 主分类号 G06F9/30
代理机构 The Law Offices of Mikio Ishimaru 代理人 The Law Offices of Mikio Ishimaru
主权项 1. A method comprising: processing signals in a processor system including first and second conjoined-cores; and sharing a single memory interconnection network port for communicating signals of the first and second conjoined-cores such that the first conjoined-core issues requests through the single memory interconnection network port to a memory bank on odd cycles and the second conjoined-core issues requests to the memory bank on even cycles.
地址 Houston TX US