Epitaxial Formation Mechanisms of Source and Drain Regions

摘要

The embodiments of mechanisms for forming source/drain (S/D) regions of field effect transistors (FETs) described enable forming an epitaxially grown silicon-containing material without using GeH4 in an etch gas mixture of an etch process for a cyclic deposition/etch (CDE) process. The etch process is performed at a temperature different form the deposition process to make the etch gas more efficient. As a result, the etch time is reduced and the throughput is increased.

主权项

1. An integrated circuit, comprising:
a gate structure disposed over a substrate; and a silicon-containing material structure formed in and over a recess adjacent to the gate structure, wherein the silicon-containing material structure includes a first epitaxial layer and a second epitaxial layer, wherein the second epitaxial layer is formed over the first epitaxial layer, and wherein the first epitaxial layer has a resistance in a range from about 0.2 mohm-cm to about 0.6 mohm-cm.