| 发明名称 |
KNOWLEDGE-BASED ANALOG LAYOUT GENERATOR |
| 摘要 |
A computer-implemented method for generating a layout of a design includes invoking the computer to receive a schematic representation of the design, generating a connection graph associated with the design, comparing the connection graph with a plurality of connection graphs stored in a database and selecting a layout associated with the matching connection graph in generating the layout of the design. |
| 申请公布号 |
US2015067626(A1) |
申请公布日期 |
2015.03.05 |
| 申请号 |
US201414476320 |
申请日期 |
2014.09.03 |
| 申请人 |
Synopsys Taiwan Co., Ltd. ;Synopsys, Inc. |
发明人 |
CHEN Tung-Chieh;WU Po-Hsun;LIN Po-Hung;HO Tsung-Yi |
| 分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A computer-implemented method for generating a layout of a design, the method comprising:
invoking the computer to receive a schematic representation of the design; generating a connection graph associated with the design; comparing the connection graph to a plurality of connection graphs stored in a database to identify a match; and selecting a layout associated with the matching connection graph in generating the layout of the design. |
| 地址 |
Taipei TW |
