发明名称 薄膜トランジスタの製造方法、薄膜トランジスタおよび電子機器
摘要 <p>The present invention provides a method of manufacturing a thin film transistor of a top-contact structure with suppressed deterioration by a process which is easy and suitable for increase in area without damaging an organic semiconductor pattern. The organic semiconductor pattern 7a is formed on a substrate 1. An electrode material film 13 is formed on the substrate 1 so as to cover the organic semiconductor pattern 7a. A resist pattern 15 is formed on the electrode material film 13. By wet etching using the resist pattern 15 as a mask, the electrode material film 13 is patterned. By the process, a source electrode 13s and a drain electrode 13d are formed.</p>
申请公布号 JP5652207(B2) 申请公布日期 2015.01.14
申请号 JP20100540479 申请日期 2009.11.24
申请人 发明人
分类号 H01L29/786;H01L21/28;H01L21/336;H01L29/417;H01L51/05;H01L51/40 主分类号 H01L29/786
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