GALS CIRCUIT AND METHOD FOR THE OPERATION THEREOF

摘要

The GALS circuit includes a circuit wrapper (350), and a locally synchronous circuit module (354) connected to the circuit wrapper. A jitter generator (352) is arranged in the appropriate location of the external or internal request signal or the external or internal clock signal path, and is designed in such a way that a corresponding signal is received and transmitted with a random signal delay. The circuit wrapper includes a request input (REQa) for request signals, a data input for data signals (DATAin), and a clock input for periodical clock signal of an external clock generator. The circuit wrapper derives an internal request signal from the external request signal which displays the validated data signals received at a data input. The internal request signal is transferred to the locally synchronous circuit module via an internal request interface. An internal clock signal (INTclk) is derived from the external clock signal, and is delivered to the locally synchronous circuit module via the internal clock interface. Independent claims are included for the following: (1) Integrated circuit with GALS circuit; and (2) Operation method of the GALS circuit.