| 摘要 |
The present invention relates to a semiconductor device including: a first active area defined by a recess formed in a device separation membrane formed in a semiconductor substrate of a first area and a second area in a surrounding circuit area including the first and second areas and a third area; a second active area defined by a device separation membrane formed in a semiconductor substrate of the third area; an embedded metal layer embedded in the recess; a first conductive layer formed at the upper part of the semiconductor substrate of the first area; a second conductive layer formed at the upper part of the semiconductor substrate of the second area; and the first conductive layer and second conductive layer formed at the upper part of the semiconductor substrate of the third area. Also, the present invention forms a three-dimensional structure dual polysilicon gate in the surrounding area, so that the transistor performance can be magnified in the surrounding circuit area. |
