发明名称 |
HIGH OUTPUT POWER AMPLIFIER |
摘要 |
A high-output electric power amplifier using a depression-type FET includes a drain voltage supply portion adapted to create a positive voltage to be applied to a drain terminal in the depression-type FET, and a gate bias voltage supply portion adapted to create a negative voltage to be applied to a gate terminal in the depression-type FET, wherein the drain voltage supply portion uses an external commercial power supply as an electric power source, and the gate bias voltage supply portion uses a battery as an electric power source, in order to certainly prevent breakdowns of the FET due to excessive electric currents. |
申请公布号 |
US2014300422(A1) |
申请公布日期 |
2014.10.09 |
申请号 |
US201214364575 |
申请日期 |
2012.11.09 |
申请人 |
Panasonic Corporation |
发明人 |
Okajima Toshiyuki |
分类号 |
H03F3/213;H03F3/195;H03F3/193 |
主分类号 |
H03F3/213 |
代理机构 |
|
代理人 |
|
主权项 |
1. A high-output electric power amplifier configured to include a depression-type FET as an amplification device, the high-output electric power amplifier comprising:
a drain voltage supply portion adapted to create and output a positive voltage to be applied to a drain terminal in the depression-type FET; and a gate bias voltage supply portion adapted to create and output a negative voltage to be applied to a gate terminal in the depression-type FET, wherein the high-output electric power amplifier is configured that the drain voltage supply portion uses an external commercial power supply as an electric power source, and the gate bias voltage supply portion uses a battery as an electric power source. |
地址 |
Kadoma-shi, Osaka JP |