发明名称 System and method for compiling machine-executable code generated from a sequentially ordered plurality of processor instructions
摘要 A method and system are provided for deriving a resultant software program from an originating software program having overlapping branches, wherein the resultant software project has either no overlapping branches or fewer overlapping branches than the originating software program. A preferred embodiment of the invented method generates a resultant software program that has no overlapping branches. The resultant software is more easily converted into programming reconfigurable logic than the originating software program. Separate and individually applicable aspects of the invented method are used to eliminate all four possible states of two overlapping branches, i.e., forward branch overlapping forward branch, back branch overlapping back branch, and each of the two possible and distinguishable states of forward branch and back branch overlap. One or more elements of each aspect of the invention may be performed by one or more computers or processors, or by means of a computer or a communications network.
申请公布号 US8856768(B2) 申请公布日期 2014.10.07
申请号 US201213360805 申请日期 2012.01.30
申请人 发明人 Mykland Robert Keith
分类号 G06F9/45 主分类号 G06F9/45
代理机构 代理人 Reilly Patrick
主权项 1. A computer-based method for eliminating overlapping back branch instructions, the method comprising: a. searching the sequence of instructions in a descending order for a first back branch instruction, the first back branch instruction directing a computer to proceed to a first earlier positioned instruction (“first target instruction”) of the sequence of instructions when a logic statement A is determined by the computer to be true; b. finding the first back branch instruction and recording the location having the logic that invokes the first back branch instruction; c. searching the sequence of instructions in the descending order for an additional back branch instruction; d. finding a second back branch instruction, the second back branch instruction directing the computer to proceed to a second earlier positioned instruction (“second target instruction”) of the sequence of instructions when a logic statement B is determined by the computer to be true, wherein the second target instruction is positioned within the sequence of instructions between the first target instruction and the recorded location having logic that invokes the first back branch instruction, whereby two overlapping back branches are formed within the sequence of instructions; e. adding a new third back branch instruction immediately after the statement logic location that invokes the second back branch instruction, the new third back instruction having logic for directing the computer to invoke the first target instruction when the logic statement A is determined by the computer to be true; and f. modifying at the location recorded in step b the logic statement originally configured to invoke the first back branch instruction to direct the computer to proceed forward to the newly added third back branch instruction when the logic statement A is determined by the computer to be true, whereby the logical flow of the sequence of instructions as modified by steps e and f eliminates the overlapping back branch logic originally formed in the sequence of instructions based on the finding in steps b and d.
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