| 发明名称 |
Resistive Switching Random Access Memory with Asymmetric Source and Drain |
| 摘要 |
The present disclosure provides one embodiment of a resistive random access memory (RRAM) structure. The RRAM structure includes a resistive memory element formed on a semiconductor substrate and designed for data storage; and a field effect transistor (FET) formed on the semiconductor substrate and coupled with the resistive memory element. The FET includes asymmetric source and drain. The resistive element includes a resistive material layer and further includes first and second electrodes interposed by the resistive material layer. |
| 申请公布号 |
US2014264222(A1) |
申请公布日期 |
2014.09.18 |
| 申请号 |
US201313795123 |
申请日期 |
2013.03.12 |
| 申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, L |
发明人 |
Yang Chin-Chieh;Chu Wen-Ting;Tu Kuo-Chi;Liao Yu-Wen;Chang Chih-Yang;Chen Hsia-Wei |
| 分类号 |
H01L45/00;H01L29/66 |
主分类号 |
H01L45/00 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A resistive random access memory (RRAM) structure, comprising:
a resistive memory element formed on a semiconductor substrate and designed for data storage, wherein the resistive element includes a resistive material layer, and first and second electrodes interposed by the resistive material layer; and a field effect transistor (FET) formed on the semiconductor substrate and coupled with the resistive memory element, wherein the FET includes asymmetric source and drain. |
| 地址 |
Hsin-Chu TW |
