LOW LEAKAGE DUAL STI INTEGRATED CIRCUIT INCLUDING FDSOI TRANSISTORS

摘要

The invention relates to an integrated circuit (9), including: -a UTBOX layer (4); -a first cell, comprising: -FDSOI transistors (1a, 1b); -a first STI (23) separating said transistors; -a first ground plane (31) located beneath one of said transistors and beneath said UTBOX layer (4); -a first well (93); -a second cell, comprising : -FDSOI transistors (1c, 1d); -a second STI (25) separating said transistors; -a second ground plane (32) located beneath one of said transistors and beneath said UTBOX layer (4); -a second well (94); -a third STI (24) separating said cells, reaching the bottom of said first and second wells (93, 94); -a deep well (92) extending continuously beneath said first and second wells, having a portion (33) beneath said third STI (24) whose doping density is at least 50% higher than the doping density of the deep well beneath said first and second STIs.