发明名称 |
COMPOSITE LAYER STACKING FOR ENHANCEMENT MODE TRANSISTOR |
摘要 |
A transistor includes a first layer of a first type disposed over a buffer layer and having a first concentration of a first material. A first layer of a second type is disposed over the first layer of the first type, and a second layer of the first type is disposed over the first layer of the second type. The second layer of the first type having a second concentration of a first material that is greater than the first concentration of the first material. A source and a drain are spaced laterally from one another and are disposed over the buffer layer. A gate disposed over at least a portion of the second layer of the first type and disposed within a recessed area defined by the first and second layers of the first type and the first layer of the second type. |
申请公布号 |
US2014131720(A1) |
申请公布日期 |
2014.05.15 |
申请号 |
US201213672754 |
申请日期 |
2012.11.09 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. |
发明人 |
HSIUNG CHIH-WEN;YU CHEN-JU;YAO FU-WEI |
分类号 |
H01L29/778;H01L21/205 |
主分类号 |
H01L29/778 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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