发明名称 STACKED MULTI-CHIP INTEGRATED CIRCUIT PACKAGE
摘要 A multi-chip integrated circuit (IC) package is provided which is configured to protect against failure due to warpage. The IC package may comprise a substrate, a level-one IC die and a plurality of level-two IC dies. The level-one IC die having a surface that is electrically coupled to the substrate. The plurality of level-two IC dies is stacked above the level-one IC die. The plurality of level-two IC dies may each have an active surface that is electrically coupled to the substrate. The plurality of level-two IC dies may be arranged side by side such that the active surfaces of the plurality of level-two IC dies are positioned substantially in a same plane. Relative to a single die configuration, the level-two IC dies are separated thereby inhibiting cracking, peeling and/or other potential failures due to warpage of the IC package.
申请公布号 US2014097535(A1) 申请公布日期 2014.04.10
申请号 US201213647375 申请日期 2012.10.08
申请人 QUALCOMM INCORPORATED 发明人 HE DONGMING;BAO ZHONGPING;HUANG ZHENYU
分类号 H01L25/065;H01L21/98;H01L23/488;H01L23/538 主分类号 H01L25/065
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