| 摘要 |
PROBLEM TO BE SOLVED: To switch between two circuit systems with different characteristics while suppressing an increase in layout size for mounting on an IC.SOLUTION: A first operation mode using a CDR circuit 1 in a PLL system stops the operation of a phase-frequency detector 31, a charge pump circuit 32, a multiphase sampler 29 (excluding DFFs 29a, 29h) and a data recovery section 30. This results in a phase tracking loop formed by a phase detector 38, a charge pump circuit 5, a loop filter 33 and a voltage-controlled oscillator 34 to recover a clock and data. A second operation mode using the CDR circuit 1 in an oversampling system stops the operation of the charge pump circuit 5 and the phase detector 38. As a result, a frequency tracking loop 28 generates multiphase clock signals. The multiphase sampler 29 samples a data signal on the multiphase clock signals, and the data recovery section 30 uses the sample data to recover data. |
