发明名称 Method for forming a transient voltage suppressor having symmetrical breakdown voltages
摘要 A vertical transient voltage suppressing (TVS) device includes a semiconductor substrate of a first conductivity type where the substrate is heavily doped, an epitaxial layer of the first conductivity type formed on the substrate where the epitaxial layer has a first thickness, and a base region of a second conductivity type formed in the epitaxial layer where the base region is positioned in a middle region of the epitaxial layer. The base region and the epitaxial layer provide a substantially symmetrical vertical doping profile on both sides of the base region. In one embodiment, the base region is formed by high energy implantation. In another embodiment, the base region is formed as a buried layer. The doping concentrations of the epitaxial layer and the base region are selected to configure the TVS device as a punchthrough diode based TVS or an avalanche mode TVS.
申请公布号 US8557671(B2) 申请公布日期 2013.10.15
申请号 US201213604834 申请日期 2012.09.06
申请人 GUAN LINGPENG;BOBDE MADHUR;BHALLA ANUP;ALPHA AND OMEGA SEMICONDUCTOR INCORPORATED 发明人 GUAN LINGPENG;BOBDE MADHUR;BHALLA ANUP
分类号 H01L21/00;H01L29/861 主分类号 H01L21/00
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