SCALABLE, CUSTOMIZABLE, AND LOAD-BALANCING PHYSICAL MEMORY MANAGEMENT SCHEME

摘要

PURPOSE: An extensible type balance load physical memory management structure is provided to improve physical memory allocation at a multi core processor by supporting load balancing, customizing, non-uniform memory access responsiveness, and expandability. CONSTITUTION: A page fault exception for thread is handled by selecting a pager for the thread from multiple pagers. A physical memory allocator is selected from multiple physical memory allocators by being connected to an allocator connected to the selected pager. The page fault exception for the thread is processed by receiving a part of allocation of a physical memory in response to an allocation request. [Reference numerals] (405) Set of memory assigners are generate when an OS kernel is booted up; (410) Pagers' sets are generate and each pager is connected to a corresponding memory assigner; (415) Each application is connected to a corresponding pager in order to enable each thread to spot a certain pager with page errors