发明名称 Unordered load/store queue
摘要 A method and processor for providing full load/store queue functionality to an unordered load/store queue for a processor with out-of-order execution. Load and store instructions are inserted in a load/store queue in execution order. Each entry in the load/store queue includes an identification corresponding to a program order. Conflict detection in such an unordered load/store queue may be performed by searching a first CAM for all addresses that are the same or overlap with the address of the load or store instruction to be executed. A further search may be performed in a second CAM to identify those entries that are associated with younger or older instructions with respect to the sequence number of the load or store instruction to be executed. The output results of the Address CAM and Age CAM are logically ANDed.
申请公布号 US8447911(B2) 申请公布日期 2013.05.21
申请号 US20080166491 申请日期 2008.07.02
申请人 BURGER DOUGLAS C.;KECKLER STEPHEN W.;MCDONALD ROBERT;SETHUMADHAVAN LAKSHMINARASIMHAN;ROESNER FRANZISKA;BOARD OF REGENTS, UNIVERSITY OF TEXAS SYSTEM 发明人 BURGER DOUGLAS C.;KECKLER STEPHEN W.;MCDONALD ROBERT;SETHUMADHAVAN LAKSHMINARASIMHAN;ROESNER FRANZISKA
分类号 G06F12/00;G06F13/00;G06F13/28 主分类号 G06F12/00
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